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Schedule

Schedule

Week 1: Introduction to Digital Circuits.

 

Lecture:

  • Integrated circuits, layout, goals of the course, etc.
  • Generic voltage transfer characteristics: VOH, VOL, VIH, VIL.
  • Definition of gate delay: tPHL, tPLH, tP.
  • Quantization of voltages, regeneration of output and immunity to noise.
  • Review of MOS logic families.

Lab:

  • Introduction to Tanner Tools
  • Design an Inverter
  • Design a NAND gate
  • Gate Delays

 

Week 2: MOS Logic Circuits

Lecture:

  • Review of MOS and BJT logic families.
  • MOS I-V characteristics; ohmic, triode, saturation, body-effect
  • MOS Spice models: LEVEL, W, L, Vto, l,g,fF, kp, tox, Cox.
  • CMOS voltage transfers characteristics (VTC).

Lab:

  • Hierarchical design approach
  • Design of half and full adder
Week 3: MOS Logic Circuit

 Lecture:

  • More on Spice parameters
  • Calculation of VTC for CMOS circuits
  • Computation of critical points
  • Body Effect in CMOS gates
  • Effect of scaling on cmos logic circuits

Lab:

  • Design of MUX
  • Boolean functions using MUX
Week 4: CMOS Logic Circuit

 Lecture:

  • Calculation of gate delay and power for MOS circuits
  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching

Lab:

  • VTC Analysis
  • Power Consumption
  • Introduction to midterm project
Week 5: CMOS Circuits

 Lecture:

  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching
  • Introduction to latches and flip-flops

Lab:

  • Midterm Project Presentation
Week 6: CMOS Circuits

 Lecture:

  • Latches
  • Flip/Flops
  • Astable multivibrator implemented with CMOS gates

Lab:

  • Latches
  • Flip Flops
Week 7: CMOS Circuits

 Lecture:

  • Clock Circuits: Ring Oscillator
  • astable multivibrator; monostable multivibrator

Lab:

  • State Machine
Week 8: CMOS Circuit

 Lecture:

  • Pass Transistor logic, Transmission gates, Dynamic logic circuits

Lab:

  • Counters
Week 9: BJT Based Digital Logic Circuits

 Lecture:

  • BJT Inverter Fan-Out, gate delay, Schottky diode BJT's.
  • Historical development: From BJT Inverter to TTL

Lab:

  • Shift Registers
  • Introduction to final project
Week 10: BJT Logic Circuits

 Lecture:

  • Standard and Schottky TTL Logic
  • Switching characteristics; totem pole configuration

Lab:

  • Final project review
Week 11: Transmission Gates, Buffers and tri-state logic

 Lecture:

  • Transmission gates
  • Buffers
  • Tri-state logic

Lab:

  • Final project review
Week 12: Transmission Gates, Buffers and tri-state logic

 Lecture:

  • BiCMOS Logic, ECL and Schmitt Trigger Circuits
  • Final Project Discussion

Lab:

  • Final project review

 

Week 13: Memory circuits

 Lecture:

  • DRAM, SRAM, and other memories

 

Week 14: Review

Lecture:

  • Final exam review

Lab:

  • Final project demonstration
Week 15: Final Exam

 Final Exam