Skip to content


Course Description:

Design and testing of logic gates, regenerative logic circuits, and semiconductor memory circuits. Implementation of such circuits with NMOS, CMOS, TTL, and other integrated circuit technologies. Use of electronic CAD tools, such as SPICE. Prerequisite: ECE 2140. (Fall, Every Year).


Time: Monday from 2:20pm to 3:35pm and Wednesday 3:45 pm to 5:00 pm
Location: TBA


Time: Wednesday from 6:10pm to 8:40pm
Location: Tompkins Hall 411


Required :

Analysis and Design of Digital Integrated Circuits, Third Edition, David A. Hodges, Horace G. Jackson, Resve A. Saleh, Mc Graw Kill (2003). ISBN: 9780072283655.



References :
Microelectronic Circuits, Fifth Edition, A. S. Sedra and K. C. Smith, Oxford (1998). ISBN 0-19-514251-9.

GW is committed to digital accessibility. If you experience a barrier that affects your ability to access content on this page, let us know via the Accessibility Feedback Form.